Vivanco 10-100MB FAST ETHERNET SWITCH 5 PORTS - PROGRAMMING Dokumentacja Pobierz pdf (Strona 79)

www.ti.com

PACKAGE OUTLINE

SEE TERMINAL

DETAIL

40X

0.3

0.2

4.6 0.1

40X

0.5

0.3

0.8 MAX

(0.1) TYP

0.05

0.00

36X 0.5

4.5

6.1

5.9

6.1

5.9

0.5

0.3

0.2

WQFN - 0.8 mm max heightRTA0040A

PLASTIC QUAD FLATPACK - NO LEAD

4214989/A 12/2014

PIN 1 INDEX AREA

0.08

SEATING PLANE

(OPTIONAL)

PIN 1 ID

0.1 C A B

0.05

EXPOSED

THERMAL PAD

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

SCALE 2.200

DETAIL

OPTIONAL TERMINAL

TYPICAL

1 2 ... 74 75 76 77 78 79 80 81 82

Physical Layer Transceiver 1
1.4 Functional Block Diagram 2
3.1 Pin Layout 5
3.2 Package Pin Assignments 6
3.4 MAC Data Interface 7
3.5 Clock Interface 8
3.6 LED Interface 8
3.7 RESET 8
3.8 Strap Options 9
3.10 Special Connections 10
3.11 Power Supply Pins 10
4 Specifications 11
DP83848Q-Q1 12
Figure 4-1. Power Up Timing 16
Figure 4-2. Reset Timing 17
Specifications 19 19
Submit Documentation Feedback 19
Specifications 21 21
Figure 4-26. Isolation Timing 24
5 Detailed Description 25
5.3 Feature Description 26
5.3.1 Auto-Negotiation 26
Detailed Description 27 27
5.3.2 Auto-MDIX 28
5.3.3 LED Interface 28
5.3.4 Internal Loopback 29
5.3.5 BIST 29
5.3.6 Energy Detect Mode 30
5.4 Device Functional Modes 30
5.4.1 MII Interface 30
5.4.2 Reduced MII Interface 31
Detailed Description 33 33
5.4.4 PHY Address 34
5.4.6 Reset Operation 35
5.5 Programming 36
5.5.1 Architecture 36
Detailed Description 39 39
Detailed Description 41 41
Detailed Description 43 43
5.6 Memory 45
Table 5-8. Register Table 46
5.6.1 Register Definition 48
Negotiation 54
5.6.2 Extended Registers 55
6.1 Application Information 63
6.2 Typical Application 63
6.2.1 Design Requirements 63
Z 2Z (1 0.48(e ) 67
6.2.3 Application Curve 68
8 Layout 70
8.2 Layout Example 73
9.1 Documentation Support 74
9.1.1 Related Documentation 74
9.2 Trademarks 74
9.4 Glossary 74
PACKAGE OPTION ADDENDUM 75
PACKAGE MATERIALS INFORMATION 77
RTA0040A 79
IMPORTANT NOTICE 82

Komentarze do niniejszej Instrukcji

Brak uwag

Vivanco 10-100MB FAST ETHERNET SWITCH 5 PORTS - PROGRAMMING Dokumentacja Strona 79

Komentarze do niniejszej Instrukcji

Powiązane produkty i podręczniki dla Switche sieciowe Vivanco 10-100MB FAST ETHERNET SWITCH 5 PORTS - PROGRAMMING